//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//
// Buffer Definitions: 
//
// cbuffer _Globals
// {
//
//   int EdgeDetectionType;             // Offset:    0 Size:     4 [unused]
//   float EdgeDetectionThreshold;      // Offset:    4 Size:     4 [unused]
//   float DepthEdgeDetectionThreshold; // Offset:    8 Size:     4 [unused]
//   int MaxSearchSteps;                // Offset:   12 Size:     4 [unused]
//   int MaxSearchStepsDiagonal;        // Offset:   16 Size:     4 [unused]
//   int CornerRounding;                // Offset:   20 Size:     4 [unused]
//   bool PredicationEnabled;           // Offset:   24 Size:     4 [unused]
//   float PredicationThreshold;        // Offset:   28 Size:     4 [unused]
//   float PredicationScale;            // Offset:   32 Size:     4 [unused]
//   float PredicationStrength;         // Offset:   36 Size:     4 [unused]
//   int DebugOutput;                   // Offset:   40 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim      HLSL Bind  Count
// ------------------------------ ---------- ------- ----------- -------------- ------
// __s0                              sampler      NA          NA             s0      1 
// __s1                              sampler      NA          NA             s1      1 
// __srgbV__ReShade__BackBufferTex    texture  float4          2d             t1      1 
// __V__edgesTex                     texture  float4          2d             t6      1 
// __V__blendTex                     texture  float4          2d             t8      1 
// _Globals                          cbuffer      NA          NA            cb0      1 
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float       
// TEXCOORD                 0   xy          1     NONE   float   xy  
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_TARGET                0   xyz         0   TARGET   float   xyz 
//
ps_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[3], immediateIndexed
dcl_sampler s0, mode_default
dcl_sampler s1, mode_default
dcl_resource_texture2d (float,float,float,float) t1
dcl_resource_texture2d (float,float,float,float) t6
dcl_resource_texture2d (float,float,float,float) t8
dcl_input_ps linear v1.xy
dcl_input_ps linear v2.xyzw
dcl_output o0.xyz
dcl_temps 3
ieq r0.x, cb0[2].z, l(1)
if_nz r0.x
  sample_indexable(texture2d)(float,float,float,float) r0.xyz, v1.xyxx, t6.xyzw, s0
  mov o0.xyz, r0.xyzx
  ret 
endif 
ieq r0.x, cb0[2].z, l(2)
if_nz r0.x
  sample_indexable(texture2d)(float,float,float,float) r0.xyz, v1.xyxx, t8.xyzw, s0
  mov o0.xyz, r0.xyzx
  ret 
endif 
sample_indexable(texture2d)(float,float,float,float) r0.x, v2.xyxx, t8.wxyz, s0
sample_indexable(texture2d)(float,float,float,float) r0.y, v2.zwzz, t8.xyzw, s0
sample_indexable(texture2d)(float,float,float,float) r0.zw, v1.xyxx, t8.ywzx, s0
dp4 r1.x, r0.xyzw, l(1.000000, 1.000000, 1.000000, 1.000000)
lt r1.x, r1.x, l(0.000010)
if_nz r1.x
  sample_l_indexable(texture2d)(float,float,float,float) r1.xyz, v1.xyxx, t1.xyzw, s1, v1.y
  mov o0.xyz, r1.xyzx
else 
  max r1.xy, r0.zwzz, r0.xyxx
  lt r1.x, r1.y, r1.x
  and r2.xz, r0.xxzx, r1.xxxx
  movc r2.yw, r1.xxxx, l(0,0,0,0), r0.yyyw
  movc r0.x, r1.x, r0.x, r0.y
  movc r0.y, r1.x, r0.z, r0.w
  dp2 r0.z, r0.xyxx, l(1.000000, 1.000000, 0.000000, 0.000000)
  div r0.xy, r0.xyxx, r0.zzzz
  mad r1.xyzw, r2.xyzw, l(0.001389, 0.001427, -0.001389, -0.001427), v1.xyxy
  sample_l_indexable(texture2d)(float,float,float,float) r2.xyz, r1.xyxx, t1.xyzw, s1, r1.y
  sample_l_indexable(texture2d)(float,float,float,float) r1.xyz, r1.zwzz, t1.xyzw, s1, r1.w
  mul r0.yzw, r0.yyyy, r1.xxyz
  mad o0.xyz, r0.xxxx, r2.xyzx, r0.yzwy
endif 
ret 
// Approximately 36 instruction slots used
